Method for manufacturing a modular semiconductor power device

ABSTRACT

The components used in the method comprise a heat-dissipating base plate, one or more three-layer plates (the top layer consisting of copper plates and strips) and a one-piece frame designed to constitute the terminals. After the chips have been soldered onto the upper plates and connected to the strips, the inner ends of the frame are soldered to points of connection with the chips. This is followed by the encapsulation in resin and the shearing of the outer portions of the frame, which, during the process, serve to temporarily connect the terminals.

CROSS-REFERENCE TO RELATED APPLICATION

This is a continuation of application Ser. No. 08/152,253, filed on Nov.12, 1993, now abandoned; which is a continuation of Ser. No. 07/864,492filed on Apr. 7, 1992, now abandoned, which is a continuation ofco-pending application Ser. No. 07/160,630 filed on 26 Feb. 1988 nowabandoned.

FIELD OF THE INVENTION

The present invention relates to a method of manufacturing a modularsemiconductor power device and to a device as obtained by such method.

BACKGROUND OF THE INVENTION

In the manufacture of modular semiconductor power devices, as in themanufacture of numerous other components, an important target is toproduce extremely reliable products using sample simple and inexpensiveprocedures.

The known semiconductor power devices involve complex and costlyprocedures, both from the point of view of the individual componentsnecessary for constructing them and from the standpoint of theirassembly and reciprocal insulation.

Some of these known devices are described in U.S. Pat. No. 4,518,982.This patent gives a detailed description of a modular power device whosemanufacturing process consists of soldering one or more semiconductorchips onto a flat portion of a first electrode (which also serves as aheat sink), soldering other electrodes (possibly containing other chips)onto the flat portion by means of a dielectric adhesive material,electrically connecting the various chips and electrodes, encapsulatingthe device in resin, and electrically insulating the heat dissipatingsurface by means of a further layer of insulating material.

OBJECT OF THE INVENTION

The object of this invention is to provide a particularly reliablemodular power device obtained by means of an extremely simple and notvery expensive assembly procedure, according to a highly flexiblemanufacturing method and with components which, although extremelylimited in number, can be used to create various circuit arrangementsand layouts, always using the same tools and always maintaininsmaintaining an identical external geometrical configuration of thedevices obtained.

SUMMARY OF THE INVENTION

According to a particular feature of the manufacturing method, thereciprocal insulated insulation of the electrodes and theirencapsulation are carried out in a single step. The manufacturing methodaccording to the invention for making a modular semiconductor powerdevice comprising one or more semiconductor chips, a metal plate fordissipating heat generated by the Joule effect, a plurality ofelectrodes constituting the signal and power terminals of the device,and a resin encapsulation, comprises soldering the chip or chips ontoone or more plates of electrically conductive material;

positioning the plate or plates on a plane substantially parallel to theaforesaid heat dissipating plate and close to the latter;

blanking, from a single sheet of conductive material, a one-piece framedesigned to constitute the power and signal terminals, the blankingenabling temporary connections to be kept between the portions of theterminal conductors designed to remain outside of the resinencapsulation;

soldering the inner ends of the terminals to points arranged for theconnection to the aforesaid chips;

encapsulating with insulting insulating resin all the active parts ofthe device, leaving uncovered the outer surface of the plate and theportions of the terminals involved with the aforesaid temporaryconnections; and

shearing the temporary connections.

Each sheet can be made of copper and that the latter, before the chipsare soldered onto it, can be placed in a plate consisting of threelayers soldered directly onto each other, in which the first layer ismade up of the sheet and copper strips insulated from the sheet itself.The intermediate layer consists of an alumina plate and the third layerconsists of a sheet of copper substantially equal in size or slightlysmaller than the intermediate layer. The aforesaid points of connectionare situated on the aforesaid sheets and strips, the soldering of theinner ends of the terminals to the aforesaid points is preceded by thesoldering of wires connecting the chips to the aforesaid strips.

The sheet can be soldered onto the internal surface of the plate and theconnections between chips and strips can be made by means of ultrasoundsoldering of aluminum wires.

The aforesaid points of connection with the chips can be located on theaforesaid sheets and on wettable metal coatings on the surface of thechips.

After blanking of the one-piece frame and before the aforesaid solderingof the inner ends of the terminals to the points of connection, theinner ends of the terminals can be bent in a direction perpendicular tothe plane of the frame.

After the encapsulation and the shearing of the temporary connections ofthe one-piece frame, the terminals designed to perform the function ofsignal terminals can be bent in a direction perpendicular to the baseplate, while the terminals designed to perform the function of powerterminals can be bent over the capsule in a direction parallel to thebase plate itself.

BRIEF DESCRIPTION OF THE DRAWINGS

The features of the invention will be more clearly evident from thefollowing description and the accompanying drawing in which:

FIG. 1 is an exploded view of the base plate and the substratessupporting the chips: ;

FIGS. 2a and 2 b, respectively, are a side view and a cross-sectionalview of the base plate of FIG. 1;

FIGS. 3a, 3 b and 3 c, respectively, are bottom, top and cross-sectionalviews of a substrate of FIG. 1;

FIG. 4 is a view of the base plate of FIG. 1 after the substrates andthe chips have been joined to it, and after the electrical connectionsbetween chips and metal coating of the substrates have been made;

FIG. 5 is a perspective view of the one-piece frame for obtaining theexternal terminals and their connections with the metal-coating of thesubstrates;

FIG. 6 is a plan view of the flattened frame from which the frame ofFIG. 5 was obtained;

FIG. 7 is a perspective view of the modular device after the resinencapsulation has been carried out by molding; and

FIGS. 8a, 8 b and 8 c are respective perspective top and bottom viewsand a plan view of the finished device.

SPECIFIC DESCRIPTION

In FIG. 1 the base plate 11 of the device acts as a heat sink as well asa support and fastener for the device itself. It is made ofheat-conductive metal with high mechanical strength. The holes A in itserve to secure it, by means of screws, onto the external heat spreader,while the grooves V serve to absorb any possible deformation of the baseplate due to the high tightening torque, thereby preventing them frombeing transmitted to the central portion of the plate.

The S-shaped recesses M, on the sides (see the side and cross-sectionalviews of the plate shown in FIGS. 2a and 2 b) serve to ensure a betteradhesion of the subsequently applied resin encapsulation, as isexplained more clearly further on with reference to FIG. 8b.

FIG. 1 also shows the components 12 and 13, which are twochip-supporting substrates, which are soldered onto the base plate 11 bymeans of the layers of solder 14.

As illustrated in FIGS. 3a, 3 b and 3 c (bottom, top and cross-sectionalviews of a substrate) each substrate is composed of aquadrangular-shaped thin medial layer 31 of alumina (less than 1 mmthick), with thin copper plates soldered directly onto its two lateralfaces. More precisely, soldered onto the face destined to lie facing theupper face of the base plate 11 is a single copper plate 32, which isalso quadrangular in shape but with slightly smaller dimensions thanthose of the layer of alumina, while the other face is provided with arectangular plate 33, for supporting the chips and for the connectionswith an external electrode, and, on either side of said plate 33,narrower plates (lateral strips) 34, 35 and 36 designed both forsoldering the conductor for connection with the chips, and for solderingother external electrodes.

FIG. 4 shows the device 41 as it appears after the two substratesubstrates have been soldered onto the base plate, the chips have beensoldered onto the larger upper copper plates b and f, and the electricalconnections have been carried out between the chips and the lateralstrips a, c, d, e, g, and h. The latter connections are obtained byultrasonic soldering with aluminum wire.

FIG. 5 shows a copper frame 51 designed to constitute the externalterminals and the connections of the latter with the lateral strips andthe plates f and b of FIG. 4. The frame of FIG. 5 is obtained byblanking from a copper sheet and by subsequently bending the terminalportions downwards, said terminal portions being subsequently solderedonto the lateral strips and the plates f and b.

FIG. 6 shows a plan view of the frame of FIG. 5, as it appears afterbeing blanked from the copper sheet and before the bending of theterminal portions, which are indicated respectively by h, g, e, d, c, a,f, and b. After being bent downwards, the terminal portions are thensoldered respectively onto the strips h, g, e, d, c, and a, and onto theplates f and b of 41. After the frame 51 has been soldered onto thedevice 41, the device is encapsulated by means of a molding process withinsulting insulating resin (e.g. thermosetting epoxy resin), preferablyof the low-stress type.

After the moldings phase, the device has the appearance shown in FIG. 7.At this point, in order to complete complete the device, it is necessaryto shear the external temporary connections between the terminals,corresponding to the portions 61 illustrated in dotted cross-hatchedlines in FIG. 6, and then bend the signal terminals upwards to avertical position, and the power terminals inwards.

The finished device takes on the appearance of FIG. 8a (top perspectiveview) and of FIG. 8b (bottom perspective view), in which 81, 82, 83 and84 indicate the signal terminals and 85, 86 and 87 indicate the powerterminals.

As shown in FIG. 8b, the resin encapsulation ends, from below, are flushwith the lower surface of the base plate 11, which can consequently besecured in direct contact with the supporting metal structure on whichit is designed to be placed, thereby ensuring efficient dissipation ofthe heat. The same figure clearly shows the function of the S-shapedrecesses M on the base plate (see FIGS. 1 and 2b). In fact, oncompletion of the device, they are completely embedded in the resinbody, so as to constitute two areas for anchoring and ensuring anefficient grip of the resin.

As shown in FIG. 8c (plan view of the device), after the bending, theterminal holes of the three power terminals 85, 86 and 87 come to restexactly above the three hexagonal nuts embedded in the resin, so as toenable the electrical connection with the external connecting rods.

The foregoing description gives a clear idea both of the versatility ofthe method of the invention and of the simplicity of the assemblingprocedure. In fact, it is clear that:

with the substrates of FIG. 1 and FIG. 3, it is possible to use chips ofdifferent number and sizes, to achieve different connections of thechips with the lateral strips, and to obtain soldered strips withdifferent geometrical layouts;

the one-piece of FIG. 5 and FIG. 6 can also be made with differentgeometrical layouts, to enable it to adapt to the different geometricallayouts of the aforesaid soldered strips, and to the differentelectrical functions of the device;

the procedures for soldering the conductors connecting the chips to themetal strips and the external electrodes to the metal chip-supportingstrips or plates are simplified due to the flat disposition of thesoldering points and to the fact that the inner ends of the electrodesare soldered when they are still firmly secured to each other by theaforesaid temporary connections; and

due to the fact that the chips are soldered onto coplanar plates and tothe presence of the temporary connections between the electrodes it isalso possible to carry out the encapsulation and reciprocal insulationof the electrodes in a single step. A further advantage, in addition tothose mentioned previously, is related to the particular structure ofthe substrate chosen for soldering the chips as well as that related tothe type of resin used for the encapsulation. In fact, these substrates,which consist of a layer of alumina with copper plates soldered directlyonto both faces, are characterized by thermal expansion coefficientsvery similar to those of silicon. This reduces to a minumum thethermomechanical stress which would otherwise be transmitted to thechips due to the differential expansion of silicon and copper (otherembodiments envisage the insertion, between the chips and the supportingcopper plates, of layers of material, such as for example, molybdenum,having an expansion coefficient lying half way between those of siliconand copper, which however complicate the assembling and lower thethermal performance).

The use of a low-stress type of resin helps to limit the stresstransmitted to the chips even in the case of chips of very largedimensions.

It is also clear that numerous modifications, adjustments, variationsand substitutions may be made to the embodiments previously described byway of example, always remaining within the spirit of this invention andits scope. For example, the wires connecting the chips to the metalstrips of the substrates can be by direct soldering between the innerterminal portions of the one-piece frame and the chips, whenever thelatter have wettable metal coatings. These internal portions can then besoldered to points (P) of connection with the chips situated on theaforesaid plates 33 and strips 34, 35, 36 (as in the case illustrated inFIGS. 4 and 5), or situated on the same plates and on wettable metalcoatings on the surface of the chips.

Likewise, the chip-supporting substrates could have a differentstructure from that previously described and the insulation between thechips and the dissipator could be achieved by means of a layer of theencapsulating resin itself—which in this case should be of high thermalconductivity—instead of by a layer of alumina.

We claim:
 1. A method of manufacturing a modular semiconductor powerdevice, comprising the steps of: (a) welding semiconductor meansincluding at least oneattaching a semiconductor chip ontoconductive-sheet means including at least onea sheet of an electricallyconductive material; (b) forming a power-device body by fixingaffixingsaid sheet to a member provided with a heat-dissipating metal plate fordissipating heat generated by the Joule effect and parallel to and closeto said heat-dissipating plate ; (c) blanking from a single sheet ofconductive material a one-pieceforming a frame formed with stripsadapted to formfor signal and power terminals offor saiddevicesemiconductor chip, and with temporary connections between atleast some of outer ends of said strips; (d) solderingselectivelyconnecting inner ends of said strips selectively to points of saidconductive sheet means connected with said semiconductor means or tosaid semiconductor meanschip; (e) encapsulating at least active parts ofsaid bodysemiconductor chip, said sheet of electrically conductivematerial, and said inner ends of said strips with an insulating resinand leaving said outer ends of said strips and an outer surface of saidplate uncovered by said resin ; and (f) shearingremoving said temporaryconnections from said strips.
 2. The method defined in claim 1whereinsaid conductor sheet means comprises a plurality of sheet memberscomposed of copper, said sheet means being disposedfurther comprisingforming said sheet of electrically conductive material by disposing afirst electrically conductive sheet member on a first face of anintermediate layer formed with an alumina plate, and a further sheet ofcopper of a size at most equal to that of the intermediate layer anddisposeddisposing a second electrically conductive sheet member onanothera second face of said intermediate layer, said inner ends of saidstrips being soldered to said sheet members and a plurality of chipsforming said semiconductor means and connected with wires soldered tosaid sheet members .
 3. The method defined in claim 2 wherein saidfurther step of affixing said sheet is soldered to a surface of saidheat-dissipating metal plate opposite said outer surface, connectionsbetween said chips and said sheet members being made by ultrasonicsoldering of aluminum wires comprises attaching said second electricallyconductive sheet member to said heat-dissipating plate.
 4. The methoddefined in claim 1 wherein said inner ends are selectively connected towettable metal coatings on surfaces of chips forming said semiconductormeans. The method defined in claim 3 wherein said step of attaching saidsecond electrically conductive sheet member to said heat-dissipating aplate comprises soldering said second electrically conductive sheetmember to said heat-dissipating plate.
 5. The method defined in claim 1wherein, after blanking of said one-piece frame and prior to thesoldering of said inner ends of said strips, said inner ends of saidstrips are bent in a direction perpendicular to a plane of said frame.The method defined in claim 4 wherein said step of soldering said secondelectrically conductive sheet member to said heat-dissipating platecomprises ultrasonically bonding said second electrically conductivesheet member to said heat-dissipating plate.
 6. The method defined inclaim 1 wherein, after encapsulation and shearing os said temporaryconnections, selected ones of said strips adapted to form signalterminals are bent in a direction perpendicular to said base plate whileothers of said strips adapted to form power terminals are bent over theencapsulating resin in a direction parallel to said base plate. Themethod defined in claim 2 wherein said step of disposing a firstelectrically conductive sheet member on a first face of an intermediatelayer comprises disposing a first electrically conductive sheet memberon a first face of an alumina layer.
 7. The method defined in claim 2wherein said steps of forming said sheet of electrically conductivematerial comprises disposing a first sheet member comprising copper on afirst face of the intermediate layer and disposing a second electricallyconductive sheet member comprising copper on a second face of saidintermediate layer.
 8. The method defined in claim 2 further comprisingdisposing a plurality of additional sheet members on said first face ofsaid intermediate layer.
 9. The method defined in claim 1 wherein saidinner ends of said strips are selectively connected to wettable metalcoatings on surfaces of said semiconductor chip.
 10. The method definedin claim 1 wherein, after forming said frame and prior to theselectively connecting of inner ends of said strips, said inner ends ofsaid strips are bent in a direction perpendicular to a plane of saidframe.
 11. The method defined in claim 1 wherein said encapsulating stepcomprises encapsulating at least parts of said semiconductor chip, saidsheet of electrically conductive material, and said inner ends of saidstrips with an encapsulating resin, and wherein, after encapsulation andremoving of said temporary connections, selected strips of said frameare adapted to form signal terminals bent in a direction perpendicularto said heat-dissipating plate while other selected strips of said frameare strips adapted to form power terminals bent over the encapsulatingresin in a direction parallel to said base heat-dissipating plate. 12.The method defined in claim 1 wherein said step of affixing said sheetto said heat-dissipating plate comprises affixing said sheet to allowheat generated by a Joule effect to be dissipated.
 13. The methoddefined in claim 1 wherein said step of affixing said sheet to saidheat-dissipating plate comprises affixing said sheet parallel to andclose to said heat-dissipating plate.
 14. The method defined in claim 1wherein said step of forming a frame comprises blanking a single sheetof conductive material.
 15. The method defined in claim 1 wherein saidstep of selectively connecting inner ends of said strips comprisessoldering said inner ends of said to said sheet of electricallyconductive material or to said semiconductor chip.
 16. The methoddefined in claim 1 wherein said step of encapsulating at least parts ofsaid semiconductor chip said sheet of electrically conductive material,and said inner ends of said strips comprises encapsulating said at leastparts of said semiconductor chip, said sheet of electrically conductivematerial, and said inner ends of said strips with an insulator.
 17. Themethod defined in claim 11 wherein said step of encapsulating saidsemiconductor chip, said sheet of electrically conductive material, andsaid inner ends of said strips with an insulator comprises encapsulatingsaid at least parts with an insulating resin.
 18. The method defined inclaim 1 wherein said step of encapsulating at least parts of saidsemiconductor chip, said sheet of electrically conductive material, andsaid inner ends of said strips with an insulator comprises leaving saidouter ends of said strips uncovered by said insulator.
 19. The methoddefined in claim 1 wherein said step of removing said temporaryconnections from said strips comprises shearing said temporaryconnections.
 20. A method for making a semiconductor package,comprising: attaching a semiconductor device to a first surface of asubstrate, said substrate having power leads on said first surface;electrically connecting said semiconductor device to said power leads;connecting selected leads of a lead frame with said power leads, saidlead frame having a plurality of said leads temporarily attached to eachother; and encapsulating at least portions of said selected leads andsaid semiconductor device.
 21. The method of claim 20 further comprisinglocating said substrate on a heat sink body prior to locating said leadframe.
 22. The method of claim 20 wherein said step of attaching asemiconductor device to a first surface of a substrate comprisesattaching a semiconductor device on a first surface of an insulatingsubstrate.
 23. The method of claim 22 wherein said step of attaching asemiconductor device to a first surface of an insulating substratecomprises attaching a semiconductor device on a first surface of analumina layer.
 24. The method of claim 23 wherein said step of attachinga semiconductor device to a first surface of an insulating substratecomprises providing a conductive layer on said alumina layer andlocating said semiconductor device on said conductive layer.
 25. Themethod of claim 24 wherein said step of providing a conductive layer onsaid alumina layer on which said semiconductor device is locatedcomprises providing a layer comprising copper.
 26. The method of claim20 wherein said step of attaching a semiconductor device to a firstsurface of a substrate comprises attaching a semiconductor device to afirst surface of a sandwich comprising an alumina layer having saidpower leads on one surface of said substrate and a conductive layer onanother surface of said substrate.
 27. The method of claim 26 whereinsaid step of attaching a semiconductor device to a first surface of asandwich comprising an alumina layer having said power leads on onesurface of said substrate and a conductive layer on another surface ofsaid substrate comprises attaching a semiconductor device to a firstsurface of a sandwich comprising an alumina layer having said powerleads on one surface of said substrate and a conductive layer comprisingcopper on another surface.
 28. The method of claim 27 further comprisinglocating said conductive layer comprising copper a body.
 29. The methodof claim 20 wherein said step of attaching a semiconductor device to afirst surface of a substrate comprises providing an insulating layerhaving three topside conductors, one of which is for carrying saidsemiconductor device, and two of which are for providing power contacts.30. The method of claim 29 further providing connecting wires from saidtwo topside conductors for providing power contacts to saidsemiconductor chip.
 31. The method of claim 29 wherein said threetopside conductors comprises copper.
 32. A method for making a packagecontaining at least one semiconductor device comprising: fabricating astructure comprising an insulating layer and plural top conductivelayers on said insulating layer; electrically coupling a semiconductordevice to at least one of said top conductive layers so that at leastsome of said top conductive layers can supply power to saidsemiconductor device; electrically contacting plural leads to at leastsome of said top conductive layers; and encapsulating at least portionsof said semiconductor device and said structure.
 33. The method of claim32 wherein said insulating layer is alumina.
 34. The method of claim 32further comprising forming said semiconductor device to present powerleads external to said encapsulated portions.
 35. The method of claim 32further comprising attaching a heat sink to said insulating layer with abottom conductive layer on said insulating layer between said insulatinglayer and said heat sink.
 36. The method of claim 35 wherein saidconductive layer between said insulating layer and said heat sinkcomprises copper.
 37. The method of claim 32 further comprisingproviding three topside conductors, one of which for carrying saidsemiconductor chip and two of which for providing power contacts. 38.The method of claim 37 further providing connecting wires from said twotopside conductors for providing power contacts to said semiconductorchip.
 39. The method of claim 37 wherein said three topside conductorscomprise copper.